Expand description
Fast RAM which, as opposed to the other RAMs, it does not carries out the simulation with other building blocks, but it emulates it with native code.
Fields
data: Vec<Signal16>
Implementations
sourceimpl Ram512
impl Ram512
sourcepub fn sim(
&mut self,
inp: Signal16,
load: Signal,
address: impl Into<Signal9>
) -> Signal16
pub fn sim(
&mut self,
inp: Signal16,
load: Signal,
address: impl Into<Signal9>
) -> Signal16
Carries out the simulation, taking as input:
inp
: data inputload
: whether to writeinp
into the RAMaddress
: which register to select
It returns the value stored at address. Furthermore, when
loadis
HI,
inpis written at location
address`, and the loaded value will
be emitted from the next time step onward.
pub fn set_inp(&mut self, inp: impl Into<Signal16>)
pub fn set_load(&mut self, load: impl Into<Signal>)
pub fn set_address(&mut self, address: impl Into<Signal9>)
pub fn out(&self) -> Signal16
Trait Implementations
Auto Trait Implementations
impl RefUnwindSafe for Ram512
impl Send for Ram512
impl Sync for Ram512
impl Unpin for Ram512
impl UnwindSafe for Ram512
Blanket Implementations
sourceimpl<T> BorrowMut<T> for Twhere
T: ?Sized,
impl<T> BorrowMut<T> for Twhere
T: ?Sized,
const: unstable · sourcefn borrow_mut(&mut self) -> &mut T
fn borrow_mut(&mut self) -> &mut T
Mutably borrows from an owned value. Read more